Tag Archives: vhdl

I2S Receiver With A Wishbone Interface For The ZPUino

The I2S bus was introduced by Philips Semiconductor in 1986. Its purpose is to provide a simple serial interface capable of transferring digital audio data between integrated circuits so, when I needed a way to transfer data between a Teensy microcontroller and my Papilio One FPGA board, an I2S receiver was a natural choice. I …

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Adapting Wishbone Cores For Use With The Papilio And DesignLab

After a hiatus of about a year I’ve pulled out my Papilio One FPGA board and started working on my VHDL programming skills again. The majority of my previous efforts involved putting together Wishbone cores for the ZPUino softcore and I thought I’d pick up where I left off. However, since I last spent any …

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Initializing An FPGA ROM From A Text File

In a previous post I described how to generate a PSK31 waveform in a microcontroller using two numerically controller oscillators (NCOs). I’m currently working on implementing a similar algorithm in an FPGA. One part of the design requires a ROM to map signals from one domain to another. Since the mapping will change as I …

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Tabula Candida

Doodles of a distracted historian

rtl-sdr.com

A blog about RTL-SDR (RTL2832) and cheap software defined radio

DuWayne's Place

Computers, Electronics, and Amateur Radio from KC3XM

QRP HomeBuilder - QRPHB -

Computers, Electronics, and Amateur Radio from KC3XM

Open Emitter

Computers, Electronics, and Amateur Radio from KC3XM

Ripples in the Ether

Emanations from Amateur Radio Station NT7S

m0xpd's 'Shack Nasties'

Computers, Electronics, and Amateur Radio from KC3XM